FPGA Selection Guide: AMD (Xilinx) vs Intel (Altera) vs Lattice

By All Chip Supply · Published Oct 10, 2026

Choosing an FPGA is rarely about picking the "best" chip. It is about matching logic capacity, I/O, power, toolchain and supply to one design. The three vendors most buyers compare are AMD (which acquired Xilinx), Intel's programmable logic business (now operating under the Altera name) and Lattice Semiconductor. Each covers a different part of the market, and each has its own tools and part-numbering rules. This guide walks through the decisions in the order most engineering teams make them, and ends with a checklist to use before you request a quote.

Start with the job the FPGA has to do

Write down what the device must do before you compare families. Typical FPGA roles fall into a few groups:

• Glue logic and bridging: level translation, interface conversion, simple state machines, power sequencing. These need few logic cells and often benefit from instant-on, non-volatile devices.
• Signal processing and control: motor control, sensor fusion, video pipelines, software-defined radio. These need DSP blocks, block RAM and enough logic for parallel data paths.
• High-speed connectivity: PCIe, 10G+ Ethernet, JESD204 data converters. These need multi-gigabit serial transceivers and hard IP blocks.
• Processing systems: designs that combine an Arm processor with programmable logic on one chip, such as AMD Zynq or Intel/Altera SoC FPGAs.

Once the role is clear, the shortlist usually narrows to two or three families.

The three vendors at a glance

AMD (Xilinx) offers a broad range from cost-optimized to very high-end parts. The 7 series includes Spartan-7, Artix-7 and Kintex-7. The UltraScale and UltraScale+ generations add Artix UltraScale+, Kintex UltraScale+ and Virtex UltraScale+. Zynq-7000 and Zynq UltraScale+ combine Arm processors with programmable logic, and Versal adaptive SoCs sit at the top. The design tool is Vivado, with Vitis for embedded and accelerated software. A good example of an entry device is the AMD Xilinx Artix-7 XC7A35T-1CPG236C, which provides 33,280 logic cells, 90 DSP slices and 1,800 Kb of block RAM in a 10x10 mm package.

Intel / Altera covers similar ground with different families. MAX 10 devices include on-chip flash, so they configure themselves at power-up. The Cyclone families (such as Cyclone V and Cyclone 10) target cost-sensitive designs, Arria 10 sits in the mid-range, and Stratix 10 and the Agilex families cover high-performance and high-bandwidth designs. The design tool is Quartus Prime.

Lattice Semiconductor focuses on small, low-power and mid-range FPGAs. The iCE40 family is known for very small, very low-power devices. MachXO2 and MachXO3 are flash-based, instant-on parts popular for control and bridging. ECP5 offers more logic, DSP and SERDES at low power, and the Nexus-based families (CrossLink-NX, Certus-NX, CertusPro-NX) add newer process technology. Lattice also offers the Avant mid-range platform. The main tools are Lattice Radiant and Lattice Diamond, depending on the family. iCE40 and ECP5 are also supported by open-source toolchains such as Yosys and nextpnr.

Size the logic, memory and DSP

Vendors measure capacity differently, so compare like with like. AMD quotes logic cells and lookup tables (LUTs), Intel/Altera quotes logic elements (LEs) or adaptive logic modules (ALMs), and Lattice quotes LUTs. A rough synthesis of your design, or of a similar reference design, is far more reliable than converting marketing numbers between vendors.

Leave headroom. Designs grow during development, and routing becomes difficult when a device is nearly full. Many teams target around 60-70 percent utilization at the start of a project, so that late features and timing fixes still fit. Check three other resources at the same time:

• Block RAM: buffers, FIFOs and lookup tables quickly use up on-chip memory.
• DSP slices or multipliers: filters, FFTs and control loops depend on them.
• Clocking resources: PLLs or MMCMs, global clock lines and clock domains.

Check I/O, transceivers and hard IP

I/O often decides the package before logic does. Count the pins you need, then add spares for debug and late changes. Check the I/O standards supported on each bank (for example LVDS, 1.8 V or 3.3 V LVCMOS) and how many banks share a supply voltage, because that constrains which signals can sit together.

If you need PCIe, high-speed Ethernet or a JESD204 link to data converters, look for multi-gigabit transceivers and hard IP blocks. They save logic and make timing closure easier, but they appear only in certain families and packages. Confirm the exact line rate the transceivers support in your chosen speed grade, not just the family maximum.

Power, configuration and boot

Static and dynamic power vary widely between families and process nodes. Use the vendor's power estimator (Xilinx Power Estimator for AMD, the Early Power Estimator for Intel/Altera, and the power calculator in Lattice tools) with your expected clock rates and toggle rates.

Configuration matters too. SRAM-based FPGAs load their configuration from external flash at power-up, which takes time and requires a configuration memory on the board. Flash-based or instant-on devices such as MAX 10 and Lattice MachXO are ready almost immediately, which helps for power sequencing and control roles. If you need bitstream security, check the encryption and authentication features of each family.

Read the part number before you order

FPGA ordering codes carry the details that make a part fit your board. Using AMD's XC7A35T-1CPG236C as an example:

• XC7A35T: the device (Artix-7, 35T size).
• -1: the speed grade. Higher numbers are faster in AMD's 7 series; other vendors use different conventions.
• CPG236: the package type and ball count.
• C: the temperature grade (commercial, 0 to 85 °C). Industrial grades use a different letter.

Intel/Altera and Lattice codes encode the same kinds of information in a different order, so always decode them with the vendor's ordering-information table in the datasheet. A part with a different package, speed grade or temperature grade is not a drop-in replacement, even when the device name matches.

Tools, licensing and team experience

Tooling has a real cost. AMD Vivado, Intel Quartus Prime and Lattice Radiant all offer free editions that cover many smaller and mid-range devices, while larger devices or advanced features may need a paid license. Check which edition supports your exact device before committing.

Supply, lead time and lifecycle

FPGAs can have long lead times, and a specific package or speed grade may be harder to find than the family as a whole. Before you finalize the design, check the lifecycle status of the part, identify a compatible alternate (for example a larger device in the same package with the same pinout), and keep your bill of materials precise down to the full ordering code. If you buy outside the franchised channel, read our guide on avoiding counterfeit chips.

Checklist before you request a quote

• The full ordering code, including speed grade, package and temperature grade.
• The quantity, and whether you need a single order or scheduled deliveries.
• Acceptable alternates, such as another speed grade or a pin-compatible device.
• Any documentation you need, such as a certificate of conformance.

Browse our industrial semiconductors for FPGAs and related parts, see microcontrollers if a fast MCU might do the job instead, read how to choose a microcontroller, or request a chip with the part number you need.